NDS register overview

libnds 1.3.1 updates

libnds has fixed the datatypes of pretty much all registers and have moved to the GBATek nomenclature for the BG-related registers. The list has been updated to match the libnds v1.3.1. of

The state of register names for NDS homebrew is a bit of a mess. First, there are the GBATek names. Since GBATek is considered the source of GBA/NDS information, it would make sense to adhere to those names pretty closely. But, of course, that's not how actually is in the de facto library for NDS homebrew, libnds.

libnds has two sets of names. This probably is a result of serving different masters in its early days. One set uses Mappy's nomenclature. That's the one without the REG_ in front of it, and uses things like _CR, and _SR. This is one you're most likely to see in the current NDS tutorials. The second set uses GBATek's names (mostly) plus a REG_ prefix. If you've done GBA programming, these should feel quite familiar.

 

For the most part, I don't really care much for the the Mappy names. One reason for this is that they don't match up with the GBATek names, making it harder to look-up what they do. More importantly, though, without any sort of prefix that indicates they're registers, they all look like the constants you put in the registers. After all, that's what all-caps usually means: a constant. When I see the identifier WIN0_X0, I'm more likely to think that it's something to set a window coordinate to, rather than that it is how to control the window. Having to wonder constantly whether a particular identifier is a constant or a register is pretty annoying(1). But perhaps this is just me.

What's especially grating about these names is that the elements of the affine matrix are transposed. HDY is actually VDX and vice versa. Shame, actually, because the HDX-VDY naming scheme does make more sense than old PA-PD names.

The elements XDY and YDX are also transposed … I think. It's hard to be sure since this nomenclature is highly ambiguous anyway. I really can't tell how the elements are supposed to be read, much less determine if they are in the correct order.

 

The REG_ registers do not suffer from those problems, but they have their own issues. The registers that had a GBA counterpart are generally okay, but in the case of the NDS-specific ones, some follow the GBATek names, some almost follow them (MTX_LOAD_4x4 vs REG_MTX_LOAD4x4, for example; note the underscores), and some are the Mappy-like names plus prefix.

Finally, registers of both nomenclatures are grouped by topic and not necessarily by address. This makes sense from an OOP point of view, but it does mean they have been sprinkled across multiple files, making it tricky to see where the things are acrually defined. Some named are also clumped inside registers_alt.h, which is a sort of transitional file. This file is not included by nds.h, which can make it hard to know which names are included or not until you either search though the whole include hierarchy or get an error from the compiler. And then have to search the hierarchy to find out the exact spelling.

 

To make it a little easier to deal with the fragmentation of the libnds headers regarding registers, here is a list of all the registers as they appear in GBATek, the primary libnds set (plus the file where they're defined), and the alternate libnds set (registers_alt.h). I've also included links to where you can find the descriptions in GBATek.

  • The bold black names are those corresponding exactly to GBATek.
  • The bold red items are problematic in some way; usually the datatype is not what is should be, or some registers have been swapped somehow. Follow the footnotes or hover over them to see my comments. Note that some of these are already fixed in CVS.
  • Sometimes there are gaps. In this case, that particular set has no name for it.

1 Arm 9 registers

  GBATek / official libnds primary libnds alternate
addr size name name file type name type name
0400:0000 4 DISPCNT R/W arm9/video.h vu32 REG_DISPCNT vu32 DISPLAY_CR
0400:0004 2 DISPSTAT R/W system.h vu16 REG_DISPSTAT vu16 DISP_SR
0400:0006 2 VCOUNT R/W system.h vu16 REG_VCOUNT vu16 DISP_Y
0400:0008       arm9/background.h bg_attribute BACKGROUND    
0400:0008       arm9/background.h vu16 BGCTRL     
0400:0008 2 BG0CNT R/W arm9/background.h vu16 REG_BG0CNT vu16 BG0_CR
0400:000A 2 BG1CNT R/W arm9/background.h vu16 REG_BG1CNT vu16 BG1_CR
0400:000C 2 BG2CNT R/W arm9/background.h vu16 REG_BG2CNT vu16 BG2_CR
0400:000E 2 BG3CNT R/W arm9/background.h vu16 REG_BG3CNT vu16 BG3_CR
0400:0010       arm9/background.h vu16 REG_BGOFFSETS     
0400:0010 2 BG0HOFS W arm9/background.h vu16 REG_BG0HOFS vu16 BG0_X0
0400:0012 2 BG0VOFS W arm9/background.h vu16 REG_BG0VOFS vu16 BG0_Y0
0400:0014 2 BG1HOFS W arm9/background.h vu16 REG_BG1HOFS vu16 BG1_X0
0400:0016 2 BG1VOFS W arm9/background.h vu16 REG_BG1VOFS vu16 BG1_Y0
0400:0018 2 BG2HOFS W arm9/background.h vu16 REG_BG2HOFS vu16 BG2_X0
0400:001A 2 BG2VOFS W arm9/background.h vu16 REG_BG2VOFS vu16 BG2_Y0
0400:001C 2 BG3HOFS W arm9/background.h vu16 REG_BG3HOFS vu16 BG3_X0
0400:001E 2 BG3VOFS W arm9/background.h vu16 REG_BG3VOFS vu16 BG3_Y0
0400:0020 2 BG2PA W arm9/background.h vs16 REG_BG2PA vs16 BG2_XDX(2)
0400:0022 2 BG2PB W arm9/background.h vs16 REG_BG2PB vs16 BG2_XDY(3)
0400:0024 2 BG2PC W arm9/background.h vs16 REG_BG2PC vs16 BG2_YDX(4)
0400:0026 2 BG2PD W arm9/background.h vs16 REG_BG2PD vs16 BG2_YDY(2)
0400:0028 4 BG2X W arm9/background.h vs32 REG_BG2X vs32 BG2_CX
0400:002C 4 BG2Y W arm9/background.h vs32 REG_BG2Y vs32 BG2_CY
0400:0030 2 BG3PA W arm9/background.h vs16 REG_BG3PA vs16 BG3_XDX(2)
0400:0032 2 BG3PB W arm9/background.h vs16 REG_BG3PB vs16 BG3_XDY(3)
0400:0034 2 BG3PC W arm9/background.h vs16 REG_BG3PC vs16 BG3_YDX(4)
0400:0036 2 BG3PD W arm9/background.h vs16 REG_BG3PD vs16 BG3_YDY(2)
0400:0038 4 BG3X W arm9/background.h vs32 REG_BG3X vs32 BG3_CX
0400:003C 4 BG3Y W arm9/background.h vs32 REG_BG3Y vs32 BG3_CY
0400:0040 2 WIN0H W       vu16 REG_WIN0H
0400:0040       arm9/video.h vu8 WIN0_X1    
0400:0041       arm9/video.h vu8 WIN0_X0    
0400:0042 2 WIN1H W       vu16 REG_WIN1H
0400:0042       arm9/video.h vu8 WIN1_X1    
0400:0043       arm9/video.h vu8 WIN1_X0    
0400:0044 2 WIN0V W       vu16 REG_WIN0V
0400:0044       arm9/video.h vu8 WIN0_Y1    
0400:0045       arm9/video.h vu8 WIN0_Y0    
0400:0046 2 WIN1V W       vu16 REG_WIN1V
0400:0046       arm9/video.h vu8 WIN1_Y1    
0400:0047       arm9/video.h vu8 WIN1_Y0    
0400:0048 2 WININ R/W arm9/video.h vu16 WIN_IN vu16 REG_WININ
0400:004A 2 WINOUT R/W arm9/video.h vu16 WIN_OUT vu16 REG_WINOUT
0400:004C 2 MOSAIC W arm9/video.h vu16 MOSAIC_CR vu32(5) REG_MOSAIC
0400:0050 2 BLDCNT R/W arm9/video.h vu16 BLEND_CR vu16 REG_BLDMOD
0400:0052 2 BLDALPHA W arm9/video.h vu16 BLEND_AB vu16 REG_COLV
0400:0054 2 BLDY W arm9/video.h vu16 BLEND_Y vu16 REG_COLY
0400:0060 2 DISP3DCNT R/W arm9/video.h vu16 GFX_CONTROL vu16 REG_GFX_CONTROL
0400:0064 4 DISPCAPCNT R/W arm9/video.h vu32 REG_DISPCAPCNT vu32 DISP_CAPTURE
0400:0068 4 DISP_MMEM_FIFO R/W arm9/video.h vu32 REG_ DISP_MMEM_FIFO    
0400:006C 2 MASTER_BRIGHT R/W arm9/video.h vu16 BRIGHTNESS    
0400:00B0       dma.h vuint32 DMA_SRC(n)    
0400:00B4       dma.h vuint32 DMA_DEST(n)    
0400:00B8       dma.h vuint32 DMA_CR(n)    
0400:00B0             vu32(6) REG_DMA 
0400:00B0 4 DMA0SAD W dma.h vuint32 DMA0_SRC vu32 REG_DMA0SAD
0400:00B4 4 DMA0DAD W dma.h vuint32 DMA0_DEST vu32 REG_DMA0DAD
0400:00B8 4 DMA0CNT R/W dma.h vuint32 DMA0_CR vu32 REG_DMA0CNT
0400:00BC 4 DMA1SAD W dma.h vuint32 DMA1_SRC vu32 REG_DMA1SAD
0400:00C0 4 DMA1DAD W dma.h vuint32 DMA1_DEST vu32 REG_DMA1DAD
0400:00C4 4 DMA1CNT R/W dma.h vuint32 DMA1_CR vu32 REG_DMA1CNT
0400:00C8 4 DMA2SAD W dma.h vuint32 DMA2_SRC vu32 REG_DMA2SAD
0400:00CC 4 DMA2DAD W dma.h vuint32 DMA2_DEST vu32 REG_DMA2DAD
0400:00D0 4 DMA2CNT R/W dma.h vuint32 DMA2_CR vu32 REG_DMA2CNT
0400:00D4 4 DMA3SAD W dma.h vuint32 DMA3_SRC vu32 REG_DMA3SAD
0400:00D8 4 DMA3DAD W dma.h vuint32 DMA3_DEST vu32 REG_DMA3DAD
0400:00DC 4 DMA3CNT R/W dma.h vuint32 DMA3_CR vu32 REG_DMA3CNT
0400:00E0       dma.h vuint32 DMA_FILL(n)    
0400:00E0 4 DMA0FILL R/W          
0400:00E4 4 DMA1FILL R/W          
0400:00E8 4 DMA2FILL R/W          
0400:00EC 4 DMA3FILL R/W          
0400:0100             vu16(6) REG_TIME 
0400:0100       timer.h vuint16 TIMER_DATA(n)    
0400:0102       timer.h vuint16 TIMER_CR(n)    
0400:0100 2 TM0D R/W timer.h vuint16 TIMER0_DATA vu16 REG_TM0D
0400:0102 2 TM0CNT R/W timer.h vuint16 TIMER0_CR vu16 REG_TM0CNT
0400:0104 2 TM1D R/W timer.h vuint16 TIMER1_DATA vu16 REG_TM1D
0400:0106 2 TM1CNT R/W timer.h vuint16 TIMER1_CR vu16 REG_TM1CNT
0400:0108 2 TM2D R/W timer.h vuint16 TIMER2_DATA vu16 REG_TM2D
0400:010A 2 TM2CNT R/W timer.h vuint16 TIMER2_CR vu16 REG_TM2CNT
0400:010C 2 TM3D R/W timer.h vuint16 TIMER3_DATA vu16 REG_TM3D
0400:010E 2 TM3CNT R/W timer.h vuint16 TIMER3_CR vu16 REG_TM3CNT
0400:0130 2 KEYINPUT R/W system.h vuint16 REG_KEYINPUT vuint16 KEYS
0400:0132 2 KEYCNT R/W system.h vuint16 REG_KEYCNT vuint16 KEYS_CR
0400:0180 2 IPCSYNC R/W ipc.h vuint16 REG_IPC_SYNC    
0400:0184 2 IPCFIFOCNT R/W ipc.h vu16 REG_IPC_FIFO_CR    
0400:0188 4 IPCFIFOSEND W ipc.h vu32 REG_IPC_FIFO_TX    
0400:01A0 2 AUXSPICNT   card.h vuint16 CARD_CR1 vu32 REG_CARD_CR1
0400:01A1       card.h vuint8 CARD_CR1H vu8 REG_CARD_CR1H
0400:01A2 2 AUXSPIDATA   card.h vuint8 CARD_EEPDATA    
0400:01A4 4     card.h vuint32 CARD_CR2 vu32 REG_CARD_CR2
0400:01A8 8     card.h vuint8 CARD_COMMAND vu8 REG_CARD_COMMAND 
0400:01B0 4     card.h vuint32 CARD_1B0 vu32 REG_CARD_1B0
0400:01B4 4     card.h vuint32 CARD_1B4 vu32 REG_CARD_1B4
0400:01B8 2     card.h vuint16 CARD_1B8 vu16 REG_CARD_1B8
0400:01BA 2     card.h vuint16 CARD_1BA vu16 REG_CARD_1BA
0400:0204 2 EXMEMCNT R/W memory.h vuint16 REG_EXMEMCNT vuint16 WAIT_CR
0400:0208 2 IME R/W interrupts.h vuint16 REG_IME vuint16 IME
0400:0210 4 IE R/W interrupts.h vuint32 REG_IE vuint32 IE
0400:0214 4 IF R/W interrupts.h vuint32 REG_IF vuint32 IF
0400:0240       arm9/video.h vu32 VRAM_CR    
0400:0240 1 VRAMCNT_A W arm9/video.h vu8 VRAM_A_CR vu8 REG_VRAM_A_CR
0400:0241 1 VRAMCNT_B W arm9/video.h vu8 VRAM_B_CR vu8 REG_VRAM_B_CR
0400:0242 1 VRAMCNT_C W arm9/video.h vu8 VRAM_C_CR vu8 REG_VRAM_C_CR
0400:0243 1 VRAMCNT_D W arm9/video.h vu8 VRAM_D_CR vu8 REG_VRAM_D_CR
0400:0244 1 VRAMCNT_E W arm9/video.h vu8 VRAM_E_CR vu8 REG_VRAM_E_CR
0400:0245 1 VRAMCNT_F W arm9/video.h vu8 VRAM_F_CR vu8 REG_VRAM_F_CR
0400:0246 1 VRAMCNT_G W arm9/video.h vu8 VRAM_G_CR vu8 REG_VRAM_G_CR
0400:0247 1 WRAMCNT W arm9/video.h vu8 WRAM_CR vu8 REG_WRAM_CNT
0400:0248 1 VRAMCNT_H W arm9/video.h vu8 VRAM_H_CR vu8 REG_VRAM_H_CR
0400:0249 1 VRAMCNT_I W arm9/video.h vu8 VRAM_I_CR vu8 REG_VRAM_I_CR
0400:0280 2 DIVCNT R/W arm9/math.h vu16 REG_DIVCNT vu16 DIV_CR
0400:0290 8 DIV_NUMER R/W arm9/math.h vs64 REG_DIV_NUMER vs64 DIV_NUMERATOR64
0400:0290       arm9/math.h vs32 REG_DIV_NUMER_L vs32 DIV_NUMERATOR32
0400:0298 8 DIV_DENOM R/W arm9/math.h vs64 REG_DIV_DENOM vs64 DIV_DENOMINATOR64
0400:0298       arm9/math.h vs32 REG_DIV_DENOM_L vs32 DIV_DENOMINATOR32
0400:02A0 8 DIV_RESULT R arm9/math.h vs64 REG_DIV_RESULT vs64 DIV_RESULT64
0400:02A0       arm9/math.h vs32 REG_DIV_RESULT_L vs32 DIV_RESULT32
0400:02A8 8 DIVREM_RESULT R arm9/math.h vs64 REG_DIVREM_RESULT vs64 DIV_REMAINDER64
0400:02A8       arm9/math.h vs32 REG_DIVREM_RESULT_L vs32 DIV_REMAINDER32
0400:02B0 2 SQRTCNT R/W arm9/math.h vu16 REG_SQRTCNT vu16 SQRT_CR
0400:02B4 4 SQRT_RESULT W arm9/math.h vs32 REG_SQRT_RESULT vs32 SQRT_RESULT32
0400:02B8 8 SQRT_PARAM R/W arm9/math.h vs64 REG_SQRT_PARAM vs64 SQRT_PARAM64
0400:02B8       arm9/math.h vs32 REG_SQRT_PARAM_L vs32 SQRT_PARAM32
0400:0300 4 POSTFLG            
0400:0304 2 POWCNT1 R/W system.h vu16 REG_POWERCNT    
0400:0320 1 RDLINES_COUNT R/W          
0400:0330 16 EDGE_COLOR W arm9/video.h vu16 GFX_EDGE_TABLE    
0400:0340 1 ALPHA_TEST_REF W arm9/video.h vu16 GFX_ALPHA_TEST    
0400:0350 4 CLEAR_COLOR W arm9/video.h vu32 GFX_CLEAR_COLOR vu32 REG_CLEAR_COLOR
0400:0354 2 CLEAR_DEPTH W arm9/video.h vu16 GFX_CLEAR_DEPTH vu16 REG_CLEAR_DEPTH
0400:0356 2 CLRIMAGE_OFFSET W          
0400:0358 4 FOG_COLOR W arm9/video.h vu32 GFX_FOG_COLOR    
0400:035C 2 FOG_OFFSET W arm9/video.h vu32 GFX_FOG_OFFSET    
0400:0360 32 FOG_TABLE W arm9/video.h vu8 GFX_FOG_TABLE     
0400:0380 64 TOON_TABLE W arm9/video.h vu16 GFX_TOON_TABLE     
0400:0400 64 GXFIFO W arm9/video.h vu32 GFX_FIFO vu32 REG_GFX_FIFO
0400:0440 4 MTX_MODE W arm9/video.h vu32 MATRIX_CONTROL vu32 REG_MTX_CONTROL
0400:0444 4 MTX_PUSH W arm9/video.h vu32 MATRIX_PUSH vu32 REG_MTX_PUSH
0400:0448 4 MTX_POP W arm9/video.h vu32 MATRIX_POP vu32 REG_MTX_POP
0400:044C 4 MTX_STORE W arm9/video.h vu32 MATRIX_STORE vu32 REG_MTX_STORE
0400:0450 4 MTX_RESTORE W arm9/video.h vu32 MATRIX_RESTORE vu32 REG_MTX_RESTORE
0400:0454 4 MTX_IDENTITY W arm9/video.h vu32 MATRIX_IDENTITY vu32 REG_MTX_IDENTITY
0400:0458 4 MTX_LOAD_4x4 W arm9/video.h vs32 MATRIX_LOAD4x4 vf32 REG_MTX_LOAD4x4
0400:045C 4 MTX_LOAD_4x3 W arm9/video.h vs32 MATRIX_LOAD4x3 vf32 REG_MTX_LOAD4x3
0400:0460 4 MTX_MULT_4x4 W arm9/video.h vs32 MATRIX_MULT4x4 vf32 REG_MTX_MULT4x4
0400:0464 4 MTX_MULT_4x3 W arm9/video.h vs32 MATRIX_MULT4x3 vf32 REG_MTX_MULT4x3
0400:0468 4 MTX_MULT_3x3 W arm9/video.h vs32 MATRIX_MULT3x3 vf32 REG_MTX_MULT3x3
0400:046C 4 MTX_SCALE W arm9/video.h vs32 MATRIX_SCALE vint32 REG_MTX_SCALE
0400:0470 4 MTX_TRANS W arm9/video.h vs32 MATRIX_TRANSLATE vint32 REG_MTX_TRANSLATE
0400:0480 4 COLOR W arm9/video.h vu32 GFX_COLOR vu32 REG_COLOR
0400:0484 4 NORMAL W arm9/video.h vu32 GFX_NORMAL vu32 REG_NORMAL
0400:0488 4 TEXCOORD W arm9/video.h vu32 GFX_TEX_COORD vu32 REG_TEXT_COORD
0400:048C 4 VTX_16 W arm9/video.h vu32 GFX_VERTEX16 vu32 REG_VERTEX16
0400:0490 4 VTX_10 W arm9/video.h vu32 GFX_VERTEX10    
0400:0494 4 VTX_XY W arm9/video.h vu32 GFX_VERTEX_XY    
0400:0498 4 VTX_XZ W arm9/video.h vu32 GFX_VERTEX_XZ    
0400:049C 4 VTX_YZ W arm9/video.h vu32 GFX_VERTEX_YZ    
0400:04A0 4 VTX_DIFF W arm9/video.h vu32 GFX_VERTEX_DIFF    
0400:04A4 4 POLYGON_ATTR W arm9/video.h vu32 GFX_POLY_FORMAT vu32 REG_POLY_FORMAT
0400:04A8 4 TEXIMAGE_PARAM W arm9/video.h vu32 GFX_TEX_FORMAT vu32 REG_TEXT_FORMAT
0400:04AC 4 PLTT_BASE W arm9/video.h vu32 GFX_PAL_FORMAT    
0400:04C0 4 DIF_AMB W arm9/video.h vu32 GFX_DIFFUSE_AMBIENT vu32 REG_DIFFUSE_AMBIENT
0400:04C4 4 SPE_EMI W arm9/video.h vu32 GFX_SPECULAR_EMISSION vu32 REG_SPECULAR_EMISSION
0400:04C8 4 LIGHT_VECTOR W arm9/video.h vu32 GFX_LIGHT_VECTOR vu32 REG_LIGHT_VECTOR
0400:04CC 4 LIGHT_COLOR W arm9/video.h vu32 GFX_LIGHT_COLOR vu32 REG_LIGHT_COLOR
0400:04D0 4 SHININESS W arm9/video.h vu32 GFX_SHININESS vu32 REG_SHININESS
0400:0500 4 BEGIN_VTXS W arm9/video.h vu32 GFX_BEGIN vu32 REG_GFX_BEGIN
0400:0504 4 END_VTXS W arm9/video.h vu32 GFX_END vu32 REG_GFX_END
0400:0540 4 SWAP_BUFFERS W arm9/video.h vu32 GFX_FLUSH vu32 REG_GFX_FLUSH
0400:0580 4 VIEWPORT W arm9/video.h vu32 GFX_VIEWPORT vu32 REG_GFX_VIEWPORT
0400:05C0 4 BOX_TEST W arm9/video.h vs32 GFX_BOX_TEST    
0400:05C4 4 POS_TEST W arm9/video.h vu32 GFX_POS_TEST    
0400:05C8 4 VEC_TEST W          
0400:0600 4 GXSTAT R/W arm9/video.h vu32 GFX_STATUS vu32 REG_GFX_STATUS
0400:0604 4 RAM_COUNT R          
0400:0604       arm9/video.h u16 GFX_POLYGON_RAM_USAGE    
0400:0606       arm9/video.h u16 GFX_VERTEX_RAM_USAGE    
0400:0610 2 DISP_1DOT_DEPTH W arm9/video.h u16 GFX_CUTOFF_DEPTH    
0400:0620 10 POS_RESULT R arm9/video.h vs32 GFX_POS_RESULT     
0400:0620       arm9/video.h vs32 POINT_RESULT     
0400:0630 6 VEC_RESULT R arm9/video.h vu16 VECTOR_RESULT     
0400:0640 40 CLIPMTX_RESULT R arm9/video.h vs32 MATRIX_READ_CLIP     
0400:0680 24 VECMTX_RESULT R arm9/video.h vs32 MATRIX_READ_VECTOR     
0400:1000 4 DISPCNT_SUB W arm9/video.h vu32 REG_DISPCNT_SUB vu32 SUB_DISPLAY_CR
0400:1008       arm9/background.h bg_attribute BACKGROUND_SUB    
0400:1008       arm9/background.h vu16 BGCTRL_SUB     
0400:1008 2 BG0CNT_SUB R/W arm9/background.h vu16 REG_BG0CNT_SUB vu16 SUB_BG0_CR
0400:100A 2 BG1CNT_SUB R/W arm9/background.h vu16 REG_BG1CNT_SUB vu16 SUB_BG1_CR
0400:100C 2 BG2CNT_SUB R/W arm9/background.h vu16 REG_BG2CNT_SUB vu16 SUB_BG2_CR
0400:100E 2 BG3CNT_SUB R/W arm9/background.h vu16 REG_BG3CNT_SUB vu16 SUB_BG3_CR
0400:1010       arm9/background.h vu16 REG_BGOFFSETS_SUB    
0400:1010 2 BG0HOFS_SUB W arm9/background.h vu16 REG_BG0HOFS_SUB vu16 SUB_BG0_X0
0400:1012 2 BG0VOFS_SUB W arm9/background.h vu16 REG_BG0VOFS_SUB vu16 SUB_BG0_Y0
0400:1014 2 BG1HOFS_SUB W arm9/background.h vu16 REG_BG1HOFS_SUB vu16 SUB_BG1_X0
0400:1016 2 BG1VOFS_SUB W arm9/background.h vu16 REG_BG1VOFS_SUB vu16 SUB_BG1_Y0
0400:1018 2 BG2HOFS_SUB W arm9/background.h vu16 REG_BG2HOFS_SUB vu16 SUB_BG2_X0
0400:101A 2 BG2VOFS_SUB W arm9/background.h vu16 REG_BG2VOFS_SUB vu16 SUB_BG2_Y0
0400:101C 2 BG3HOFS_SUB W arm9/background.h vu16 REG_BG3HOFS_SUB vu16 SUB_BG3_X0
0400:101E 2 BG3VOFS_SUB W arm9/background.h vu16 REG_BG3VOFS_SUB vu16 SUB_BG3_Y0
0400:1020 2 BG2PA_SUB W arm9/background.h vs16 REG_BG2PA_SUB vs16 SUB_BG2_XDX(2)
0400:1022 2 BG2PB_SUB W arm9/background.h vs16 REG_BG2PB_SUB vs16 SUB_BG2_XDY(3)
0400:1024 2 BG2PC_SUB W arm9/background.h vs16 REG_BG2PC_SUB vs16 SUB_BG2_YDX(4)
0400:1026 2 BG2PD_SUB W arm9/background.h vs16 REG_BG2PD_SUB vs16 SUB_BG2_YDY(2)
0400:1028 4 BG2X_SUB W arm9/background.h vs32 REG_BG2X_SUB vs32 SUB_BG2_CX
0400:102C 4 BG2Y_SUB W arm9/background.h vs32 REG_BG2Y_SUB vs32 SUB_BG2_CY
0400:1030 2 BG3PA_SUB W arm9/background.h vs16 REG_BG3PA_SUB vs16 SUB_BG3_XDX(2)
0400:1032 2 BG3PB_SUB W arm9/background.h vs16 REG_BG3PB_SUB vs16 SUB_BG3_XDY(3)
0400:1034 2 BG3PC_SUB W arm9/background.h vs16 REG_BG3PC_SUB vs16 SUB_BG3_YDX(4)
0400:1036 2 BG3PD_SUB W arm9/background.h vs16 REG_BG3PD_SUB vs16 SUB_BG3_YDY(2)
0400:1038 4 BG3X_SUB W arm9/background.h vs32 REG_BG3X_SUB vs32 SUB_BG3_CX
0400:103C 4 BG3Y_SUB W arm9/background.h vs32 REG_BG3Y_SUB vs32 SUB_BG3_CY
0400:1040 2 WIN0H_SUB W       vu16 REG_WIN0H_SUB
0400:1040       arm9/video.h vu8 SUB_WIN0_X1    
0400:1041       arm9/video.h vu8 SUB_WIN0_X0    
0400:1042 2 WIN1H_SUB W       vu16 REG_WIN1H_SUB
0400:1042       arm9/video.h vu8 SUB_WIN1_X1    
0400:1043       arm9/video.h vu8 SUB_WIN1_X0    
0400:1044 2 WIN0V_SUB W       vu16 REG_WIN0V_SUB
0400:1044       arm9/video.h vu8 SUB_WIN0_Y1    
0400:1045       arm9/video.h vu8 SUB_WIN0_Y0    
0400:1046 2 WIN1V_SUB W       vu16 REG_WIN1V_SUB
0400:1046       arm9/video.h vu8 SUB_WIN1_Y1    
0400:1047       arm9/video.h vu8 SUB_WIN1_Y0    
0400:1048 2 WININ_SUB R/W arm9/video.h vu16 SUB_WIN_IN vu16 REG_WININ_SUB
0400:104A 2 WINOUT_SUB R/W arm9/video.h vu16 SUB_WIN_OUT vu16 REG_WINOUT_SUB
0400:104C 2 MOSAIC_SUB W arm9/video.h vu16 SUB_MOSAIC_CR vu32(5) REG_MOSAIC_SUB
0400:1050 2 BLDCNT_SUB R/W arm9/video.h vu16 SUB_BLEND_CR vu16 REG_BLDMOD_SUB
0400:1052 2 BLDALPHA_SUB W arm9/video.h vu16 SUB_BLEND_AB vu16 REG_COLV_SUB
0400:1054 2 BLDY_SUB W arm9/video.h vu16 SUB_BLEND_Y vu16 REG_COLY_SUB
0400:106C 2 MASTER_BRIGHT_SUB   arm9/video.h vu16 SUB_BRIGHTNESS    
0410:0000 4 IPCFIFORECV R ipc.h vu32 REG_IPC_FIFO_RX vu32 REG_CARD_DATA
0410:0010 4     card.h vu32 CARD_DATA_RD vu32 REG_CARD_DATA_RD

2 Arm 7 registers

  GBATek / official libnds primary libnds alternate
addr size name name file type name type name
0400:0004 2 DISPSTAT R/W system.h vu16 REG_DISPSTAT vu16 DISP_SR
0400:0006 2 VCOUNT R/W system.h vu16 REG_VCOUNT vu16 DISP_Y
0400:00B0       dma.h vuint32 DMA_SRC(n)    
0400:00B4       dma.h vuint32 DMA_DEST(n)    
0400:00B8       dma.h vuint32 DMA_CR(n)    
0400:00B0 4 DMA0SAD W dma.h vuint32 DMA0_SRC vu32 REG_DMA0SAD
0400:00B4 4 DMA0DAD W dma.h vuint32 DMA0_DEST vu32 REG_DMA0DAD
0400:00B8 4 DMA0CNT R/W dma.h vuint32 DMA0_CR vu32 REG_DMA0CNT
0400:00BC 4 DMA1SAD W dma.h vuint32 DMA1_SRC vu32 REG_DMA1SAD
0400:00C0 4 DMA1DAD W dma.h vuint32 DMA1_DEST vu32 REG_DMA1DAD
0400:00C4 4 DMA1CNT R/W dma.h vuint32 DMA1_CR vu32 REG_DMA1CNT
0400:00C8 4 DMA2SAD W dma.h vuint32 DMA2_SRC vu32 REG_DMA2SAD
0400:00CC 4 DMA2DAD W dma.h vuint32 DMA2_DEST vu32 REG_DMA2DAD
0400:00D0 4 DMA2CNT R/W dma.h vuint32 DMA2_CR vu32 REG_DMA2CNT
0400:00D4 4 DMA3SAD W dma.h vuint32 DMA3_SRC vu32 REG_DMA3SAD
0400:00D8 4 DMA3DAD W dma.h vuint32 DMA3_DEST vu32 REG_DMA3DAD
0400:00DC 4 DMA3CNT R/W dma.h vuint32 DMA3_CR vu32 REG_DMA3CNT
0400:0100       timer.h vuint16 TIMER_DATA(n)    
0400:0102       timer.h vuint16 TIMER_CR(n)    
0400:0100 2 TM0D R/W timer.h vuint16 TIMER0_DATA vu16 REG_TM0D
0400:0102 2 TM0CNT R/W timer.h vuint16 TIMER0_CR vu16 REG_TM0CNT
0400:0104 2 TM1D R/W timer.h vuint16 TIMER1_DATA vu16 REG_TM1D
0400:0106 2 TM1CNT R/W timer.h vuint16 TIMER1_CR vu16 REG_TM1CNT
0400:0108 2 TM2D R/W timer.h vuint16 TIMER2_DATA vu16 REG_TM2D
0400:010A 2 TM2CNT R/W timer.h vuint16 TIMER2_CR vu16 REG_TM2CNT
0400:010C 2 TM3D R/W timer.h vuint16 TIMER3_DATA vu16 REG_TM3D
0400:010E 2 TM3CNT R/W timer.h vuint16 TIMER3_CR vu16 REG_TM3CNT
0400:0120 4 SIODATA32   arm7/serial.h vuint32 SIO_DATA32    
0400:0120       arm7/serial.h vuint16 SIO_MULTI_0    
0400:0122       arm7/serial.h vuint16 SIO_MULTI_1    
0400:0124       arm7/serial.h vuint16 SIO_MULTI_2    
0400:0126       arm7/serial.h vuint16 SIO_MULTI_3    
0400:0128 4 SIOCNT   arm7/serial.h vuint16 REG_SIOCNT vu16 REG_SIOCNT
0400:012A       arm7/serial.h vuint8 SIO_DATA8    
0400:012A       arm7/serial.h vuint16 SIO_MULTI_SEND vu16 REG_SIOMLT_SEND
0400:012C   SIOSEL            
0400:0130 2 KEYINPUT   system.h vuint16 REG_KEYINPUT vuint16 KEYS
0400:0132 2 KEYCNT   system.h vuint16 REG_KEYCNT vuint16 KEYS_CR
0400:0134 2 RCNT   arm7/serial.h vuint16 REG_RCNT vu16 REG_RCNT
0400:0136 2 EXTKEYIN   arm7/serial.h vuint16 REG_KEYXY    
0400:0138 2     arm7/serial.h vuint16 RTC_CR    
0400:0138       arm7/serial.h vuint8 RTC_CR8    
0400:0140 2 JOYCNT R/W       vu16 REG_HS_CTRL
0400:0180 2 IPCSYNC R/W ipc.h vuint16 REG_IPC_SYNC    
0400:0184 2 IPCFIFOCNT R/W ipc.h vu16 REG_IPC_FIFO_CR    
0400:0188 4 IPCFIFOSEND W ipc.h vu32 REG_IPC_FIFO_TX    
0400:01A0 2 AUXSPICNT   card.h vuint16 CARD_CR1 vu32 REG_CARD_CR1
0400:01A1       card.h vuint8 CARD_CR1H vu8 REG_CARD_CR1H
0400:01A2 2 AUXSPIDATA   card.h vuint8 CARD_EEPDATA    
0400:01A4 4 ROMCTRL   card.h vuint32 CARD_CR2 vu32 REG_CARD_CR2
0400:01A8 8     card.h vuint8 CARD_COMMAND  vu8 REG_CARD_COMMAND 
0400:01B0 4     card.h vuint32 CARD_1B0 vu32 REG_CARD_1B0
0400:01B4 4     card.h vuint32 CARD_1B4 vu32 REG_CARD_1B4
0400:01B8 2     card.h vuint16 CARD_1B8 vu16 REG_CARD_1B8
0400:01BA 2     card.h vuint16 CARD_1BA vu16 REG_CARD_1BA
0400:01C0 2 SPICNT   arm7/serial.h vuint16 REG_SPICNT vuint16 SERIAL_CR
0400:01C2 2 SPIDATA   arm7/serial.h vuint16 REG_SPIDATA vuint16 SERIAL_DATA
0400:0204 2 EXMEMSTAT   memory.h vuint16 REG_EXMEMSTAT vuint16 WAIT_CR
0400:0206 2 WIFIWAITCNT W          
0400:0208 4 IME   interrupts.h vuint16 REG_IME vuint16 IME
0400:0210 4 IE   interrupts.h vuint32 REG_IE vuint32 IE
0400:0214 4 IF   interrupts.h vuint32 REG_IF vuint32 IF
0400:0240 1 VRAMSTAT R          
0400:0241 1 WRAMSTAT R          
0400:0300 1 POSTFLG   system.h vuint16 HALT_CR    
0400:0301 1 HALTCNT            
0400:0304 2 POWCNT2 R/W system.h vu16 REG_POWERCNT vu16 POWER_CR
0400:0308 4 BIOSPROT   memory.h vuint32 PROTECTION    
0400:04x0 4 SOUNDxCNT R/W arm7/audio.h vuint32 SCHANNEL_CR(n)    
0400:0400       arm7/audio.h vuint8 SCHANNEL_VOL(n)    
0400:0402       arm7/audio.h vuint8 SCHANNEL_PAN(n)    
0400:04x4 4 SOUNDxSAD W arm7/audio.h vuint32 SCHANNEL_SOURCE(n)    
0400:04x8 2 SOUNDxTMR W arm7/audio.h vint16 SCHANNEL_TIMER(n)    
0400:04xA 2 SOUNDxPNT W arm7/audio.h vuint16 SCHANNEL_REPEAT_POINT(n)    
0400:04xC 4 SOUNDxLEN W arm7/audio.h vuint32 SCHANNEL_LENGTH(n)    
0400:0500 2 SOUNDCNT R/W arm7/audio.h vuint16 SOUND_CR    
0400:0500       arm7/audio.h vuint8 SOUND_MASTER_VOL    
0400:0504 2 SOUNDBIAS R/W arm7/audio.h vuint16 SOUND_BIAS    
0400:0508 1 SNDCAP0CNT R/W arm7/audio.h vu8 REG_SNDCAP0CNT    
0400:0509 1 SNDCAP1CNT R/W arm7/audio.h vu8 REG_SNDCAP1CNT    
0400:0510 4 SNDCAP0DAD R/W arm7/audio.h vu32 REG_SNDCAP0DAD    
0400:0514 2 SNDCAP0LEN W arm7/audio.h vu16 REG_SNDCAP0LEN    
0400:0518 4 SNDCAP1DAD R/W arm7/audio.h vu32 REG_SNDCAP1DAD    
0400:051C 2 SNDCAP1LEN W arm7/audio.h vu16 REG_SNDCAP1LEN    
0410:0000 4 IPCFIFORECV R ipc.h vu32 REG_IPC_FIFO_RX vu32 REG_CARD_DATA
0410:0010 4     card.h vuint32 CARD_DATA_RD vu32 REG_CARD_DATA_RD

Notes:
  1. See also BG_TILE_BASE and BG_TILE_RAM, for the REG_BGxCNT macro and the VRAM address, respectively. Yeah, you can tell because obviously RAM means memory, but it's still an easy mistake to make, especially since the VRAM areas are called “base” as well.
  2. Ambiguous terms: X/Y for both vector and coordinate.
  3. Ambiguous terms: X/Y for both vector and coordinate. Should probably be _YDX element.
  4. Ambiguous terms: X/Y for both vector and coordinate. Should probably be _XDY element
  5. Should be vu16, not vu32
  6. Should be struct

7 thoughts on “NDS register overview

  1. wrt note 2:
    http://nocash.emubase.de/gbatek.htm#dsvideo (yes seriously)

    wrt naming: I wrote libnds prior to gbatek. We are tending towards gbatek naming though the naming is lifted directly from the SDK (so I am told) which is problematic.

    wrt errors: I am trying to fix data types as they come in. I will cross reference this list with current cvs and correct type errors for next release.

    Thanks again for the excelent feedback...as for naming I will accept a patch which renames all registers to gbatek naming if one is submitted otherwise I cannot make any promises...time is not in great supply at the moment but i will make an attempt if the other devs agree.

  2. [quote]Ian wrote:
    Wow that's a lot of red.
    [/quote]
    Well, it is a little exaggerated. Most of the red here is for the affine datatypes, which technically should be signed. However, because these are read-only anyway it's not that big of a deal in the grand scheme of things. Having said that,people seem to model their datatypes on the ones from the registers, and when you start doing fixed-point arithmetic with unsigned types the right-shifts can lead to bad results. That's the thing to watch out for.

  3. BG_MAP_RAM and BG_TILE_RAM and friends also have the dubious quality of being memory address macros without a built in cast-to-pointer-type (cf BG_PALETTE, SPRITE_PALETTE and friends), so if you want to copy some data in there you've got to cast them yourself. Not a big drama but it looks a bit odd when the palette copy doesn't need a cast, but then the tiles and map data copies do.

  4. I can't imagine what visual effect you can make with a R/W vcount :)

  5. Hi there
    thanks for the namings...
    I was wondering, if i wanna send and receive data (I/O interface) from the Slot2, which registers are involved in the process?

    thanks anyway

    Romu

  6. Pingback: Important links « embedded programming on the nds

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